This application incorporates by reference the teachings of PCT Publication WO97/08861, published Mar. 6, 1997 for details of SCDMA transmitters and receivers, and incorporates by reference the teachings of PCT publication WO97/34421, published Sep. 18, 1997 for apparatus and methods of using SCDMA on hybrid fiber coax plants to use ATM cells for data transfer.
The invention is useful in the field of digital communications over any media, but, in particular, over hybrid fiber coax (HFC).
An emerging technology for cable TV systems is the provision of interactive, bidirectional digital data communications over the same HFC media as is used to provide TV signals to subscribers. Terayon Communication Systems first started shipping cable modems in July of 1997 that had the capability to send digital data using synchronous code division multiple access (SCDMA) multiplexing of digital data from multiple sources bidirectionally over HFC. In that system (described fully in the PCT publications incorporated herein, hereafter sometimes simply referred to as the PCT publications), downstream and upstream transmissions had gaps between frames. Frame synchronization in the upstream between the same frame number transmitted by different remote units (RUs) at differing distances from a central unit (CU) was important for low ISI noise. This was achieved by transmitting barker codes upstream at variable delays from each RU until a delay was found for each RU which resulted in its barker code arriving in the center of the gap between CU frames. This transmit frame timing delay determined for each modem in a trial and error process called ranging is then used for transmission of subsequent upstream frames by that RU. All RUs align to the same frame.
Downstream synchronization was achieved by transmission of barker codes from the CU to the RUs during every downstream gap. The RUs detected the CU barker codes and used that information to determine the CU downstream frame boundaries. The downstream barker codes also were encoded to include the downstream chip clock so that all the RUs could synchronize to the CU master chip clock. Known pilot channel data transmitted during timeslot 0 in the downstream (the SCDMA multiplexing is done over a TDM input stream) from the CU was used to do carrier recovery and monitor frame synchronization and to transmit kiloframe information. Clock recovery in the RUs was from the downstream barker codes using early-late gating techniques. In subsequent evolutions, the pilot channel data was only used to send frame sequence data and kiloframe marker information, and no carrier recovery was performed using the pilot channel data. Carrier recovery was done from the recovered downstream clock since at the CU the downstream carrier was generated to be phase coherent with the downstream clock. The arrival of the barker code in the downstream frame gaps also served as a reference for each RU from which to measure a transmit frame timing delay to achieve upstream frame synchronization.
An emerging standard for use in digital multi-service delivery through TV distribution systems is MCNS. In this standard, MAC layer data frames are broken down into MPEG packets which are 64-QAM or 256-QAM modulated and sent downstream in a continuous stream after FEC encoding. The FEC encoding involves four layers of processing: the MPEG packets are broken up and encoded into Reed-Solomom blocks with block boundaries bearing no relationship to MPEG packet boundaries; an interleaver mixes up the resulting 7 bit symbols so symbols formerly contiguous in time are no longer contiguous; a randomizer that takes the output of the interleaver and scrambles the symbols in pseudorandom order; and a trellis encoder adds some redundant bits. There are no gaps in the downstream data in which the CU can send a barker code which carries the master chip clock and which signals frame boundaries. There are no downstream frame boundaries related to the MPEG packet frames, but there are FEC frames delineated by a 42 bit FEC sync trailer appended to the end of 60 R-S blocks for 64-QAM, each R-S block containing 128 7 bit symbols. There is a 28-bit unique sync pattern in the first 4 symbols of the trailer. The remaining 14 bits are utilized for interleaver control. The trailer is inserted by the R-S encoder and detected by the R-S decoder to locate FEC frame boundaries. There is no synchronization coupling between the FEC and transport layers where MPEG packets are processed.
SCDMA upstreams require that all RUs be synchronized in frequency and have their frame boundaries aligned in time at the CU. To do this, the upstream must be synchronized to the downstream and mechanisms are needed to account for the fact that the propagation delay in transmissions from each RU to the CU encounter different propagation delays. The difficulty in resynchronizing an SCDMA upstream to a downstream with a different clock rate is that there are a wide range of different standards and different clock rates. Further, digital resampling can lead to two different downstream clock rates even within the same downstream.
If an SCDMA upstream is to be used with a downstream with an arbitrary clock rate such as an MCNS downstream or a IEEE 802.14 standard downstream, there arises a need for:
(1) a way to maintain a rational relationship between the downstream and upstream clock rates through the use of PLLs or digital resamplers;
(2) circuits for generating timestamp messages to establish a CU reference replacing the barker codes from which the round trip delay can be measured for fast ranging;
(3) a circuit for reducing the jitter of the timestamp messages to improve the accuracy of delay estimates for fast ranging;
(4) a circuit for detecting upstream clock slips.
There is described herein two examples of systems for transmitting digital data bidirectionally over shared media such as cable TV plants using upstream Synchronous CDMA multiplexing. The distinguishing characteristics of a genus to which these two species belong is the generation in the RUs of an upstream carrier and upstream chip clock both of which are synchronized in phase with a CU master clock. They are synchronized in phase by virtue of being synchronized in phase with a downstream symbol clock which is recovered from the downstream data transmitted by the CU, the downstream symbol clock being both synchronized in phase with the CU master clock and having a different frequency than the upstream chip clock. The advantage of the aspect of the invention that synchronizes the upstream clock to the CU master clock or at least makes it phase coherent therewith and which generates a phase coherent upstream carrier from the recovered downstream clock is that it eliminates the need for upstream clock and carrier recovery circuitry in the CU since the upstream clock and carrier are phase coherent with locally generated clock and carrier signals in the CU. In other words, since the upstream clock and carrier are phase synchronous with the CU master clock, the upstream data can be demodulated and demultiplexed using upstream clock and carrier signals generated from the CU master clock after suitable phase and amplitude adjustments for each RU derived from known preamble data transmitted by the RU using the upstream clock and carrier derived from the recovered downstream clock. Although a PLL is used in the CU, it is used to generate an upstream local clock signal from a master clock signal which has its frequency set so as to generate a downstream clock signal or at some multiple of the downstream symbol clock frequency. In other words, a distinguishing characteristic of the first genus of inventive species is that they employ a master clock to generate a clock signal which can be used directly or indirectly for whatever clock frequency is used for one direction of transmission and a PLL or digital resampler which generates a phase synchronous clock signal which can be used for the other direction of transmission. That is, if the CU master clock generates a clock signal that is either the symbol or bit clock rate for the downstream, a PLL coupled to the CU master clock generates a local clock signal at the upstream chip clock rate which is phase synchronous with the downstream clock rate but at the frequency needed by the upstream demodulator even if that is a different frequency than the downstream frequency. The upstream clock frequency generated by the PLL is related to the downstream clock frequency by the ratio M/N where M and N are Integers and the PLL multiplies the downstream clock frequency generated by the CU master clock by the ratio M/N to generate the upstream clock. The reverse can be true where the CU master clock generates the upstream clock and the PLL multiplies this clock by a ratio M/N of integers to generate a downstream clock.
Although the two examples given utilize an SCDMA upstream and an MCNS or TDMA downstream, the invention is intended to work with any downstream type transmission having any chip clock, symbol clock or bit clock rate which is different than the upstream chip clock rate of the SCDMA circuitry but which is related by the ratio of integers M/N. The invention can be employed regardless of whether the downstream data is either a simple stream of data from a single source or a multiplexed stream from multiple sources as long as the downstream and upstream clock rates or some integer multiple of one or both can be related by the integer ratio M/N.
Also disclosed is a system to speed up the ranging process taught in the PCT publications incorporated by reference by determining a frame alignment offset for the RU prior to the start of ranging. This is done using timestamp messages normally sent in the MCNS downstream to establish a reference to the CU master clock such that a determination can be made of the time offset between the CU frame boundary and the RU frame boundary. This is done by sampling a local kiloframe counter clock when a downstream sync message is received. The RU upstream kiloframe boundary offset is then calculated according to Equation (5), and the RU kiloframe boundary is adjusted per this calculation. Then ranging using barker codes is performed to establish precise frame alignment.
The RU kiloframe boundary offset calculation is more accurate if the sync messages arrive with low jitter from the CU. An apparatus and method is taught which adjusts the time of insertion of sync messages so that they do not straddle MPEG packet headers and are always inserted in the same place in an FEC frame.
In embodiments where an SCDMA upstream is used, code misalignments cause ISI and interfere with reception of data from other RUs. This can be caused by clock slip between the upstream clock synthesized from the recovered downstream clock so as to be phase coherent. A clock slip detector counts the upstream clock cycles during a predetermined interval established by the recovered downstream clock and generates an interrupt which causes a service routine to read the count and compare it to the expected count and shut down the RU transmitter and attempt to resynchronize if slip of more than 35 nanoseconds is detected.
Also disclosed is the preferred form of an SCDMA RU upstream transmitter adapted for use in the minislot environment of 802.14 or MCNS systems. This transmitter breaks upstream APDUs (ATM packets with parity) into Reed-Solomon blocks of programmable size and encodes them with a programmable number of error detecting and correcting bits, all in accordance with instructions from the headend controller. The encoded blocks are interleaved and buffered for release when minislot assignments are received from a TC layer process which receives its minislot assignments in downstream messages from a headend controller process. A minislot counter in the RU is offset by the ranging process to an offset such that when the RU minislot counter reaches the count of the first assigned minislot, data is released from the buffer into the CDMA spreading circuitry. The timing is such that it arrives aligned with the minislot boundaries of the CU. The data released from the buffer is broken up into information vectors each having an number of elements equal to the number of codes in the codebook. The number of codes is programmable in accordance with instructions from the headend controller. Each element is a chip. The chip rate is programmable in accordance with instructions from the headend controller process. Only the chips corresponding to codes which are mapped to the assigned minislots are populated with data. All the RUs and CU have a permanent mapping of codes to minislots stored in lookup tables. The information vectors are trellis encoded by a programmable trellis encoding modulator. Modulation types are programmable in accordance with instructions from the headend controller. Trellis encoding can be turned off. The information vectors then have their spectrums spread by matrix multiplication by a code matrix, and a framing circuit concatenates the result vectors, each of which is one symbol, into eight symbol frames followed by a programmable size gap. A programmable pre-emphasis filter adjusts the spectrum in accordance with tap weights established by a training process and a polyphase transmit filter raises the sample rate, limits the bandwidth of each image to 6 mHz and applies a fine gain control. A programmable frequency translator then QAM modulates the chips onto sine waves at the sampling rate frequency, converts the digital data to an analog signal and mixes the frequency with a programmable reference frequency to obtain an RF signal the desired upstream frequency. A final programmable power amplifier applies coarse power control.
Also disclosed is a ranging/training process adapted for the 802.14 and MCNS environment to achieve frame/minislot alignment, channel equalization and power alignment. The CU sends downstream ranging invitations naming the gap by number during which ranging information is to be sent by any RU needing to range. The frames and gaps of the upstream are numbered and there is a mapping known to all the RUs and. the CUs as to which frames correspond to which minislot numbers. Each RU responds by sending a 17 gap sequence of barker codes starting with a xe2x80x9cstart bitxe2x80x9d comprised of a 16 chip barker code. The xe2x80x9cstart bitxe2x80x9d is followed by 16 gaps of on or off bits with an on bit defined as a gap in which the barker code is sent and an off bit defined as a gap in which the barker code is not sent. The 16 gaps are exactly 50% populated by barker codes in a unique temporary ID sequence. Gaps are referenced to the RUs minislot/frame/gap counting timebase, not the CU""s timebase. If no response message is received indicating the RU hit the gap, the RU adjusts its offset value by 4 chips and waits for the next ranging invitation. This process happens at a single inaugural power level. If an entire frame worth of incrementations has occurred without hitting the gap, the power level is incremented and the offset incrementation is started again.
When the RU hits the gap, the CU detects this fact, and, sends a downstream message so indicating. If more than one RU has hit the same gap, a collision message is sent and the RUs execute a collision resolution protocol which causes some of them to stop attempting to range temporarily. After, an RU has successfully ranged, the CU sends a training invitation to the RU. The RU then executes a training process by sending known data on known codes. The CU then determines what, if any fine tuning of the offset is needed, and allows its adaptive filters to settle on tap coefficients that equalize the channel. During the training interval, the CU also determine power levels which cause the codes from the RU in training to arrive at the CU at the same power levels as codes from other RUs. The tap coefficients and power levels and any fine tuning of the offset are sent downstream to the RU to adjust its transmitter. The CU then sends a downstream message requesting the 48-bit MAC address of the RU and the RU responds.